The 20th HiPEAC conference held in Bologna, Italy, from January 20th to 22nd is behind us and it was a special event for the members of the Initiative. In addition to being a sponsor of the conference, with a booth visited by many attendees, EPI members made themselves a busy schedule, participating in sessions on each day of the conference.

On the first day, Imen Baili from Menta, participated in the WRC: Workshop on Reconfigurable Computing, with a presentation titled European Processor and the role of eFPGA, where she spoke about FPGA applications and the difference between Menta’s eFPGA solution VS FPGA. She also addressed the advantages such a solution brings to EPI, offering the most robust verification flow as well as the fact that pure digital IP guarantees very fast delivery.

On the second day of the conference, John Davis, from BSC attended the Eurolab4HPC Industrial Session on Open Source Hardware and introduced LOCA – the European Laboratory for Open Computer Architecture. In his presentation, he also addressed the RISC-V involvement in EPI.

In addition to the sessions and EPI workshops organized, Fabrizio Magugliani from E4 and Andrea Bartolini from the University of Bologna, held a 10-minute industry session introducing EPI and inviting the attendees to attend the EPI Tutorial.

On the very last day, after discussing with many interested attendees and STEM students, EPI team organized our own tutorial titled “First steps towards a made-in-Europe high-performance microprocessor”, covering the latest in EPI.

Josip Knezović, from UNIZG-FER, gave a general introduction into the tutorial, while Denis Dutoit from CEA covered General EPI overview and details of EPI’s Common Platform and Rhea 1st implementation.

Mauro Olivieri from BSC and Andrea Bartolini from UNIBO followed up with two very important aspects as well – accelerators in EPI and EPI power management, while the first section of the tutorial was closed by a presentation from Fabrizio Magugliani from E4 on EPI PCIe daughter card as a software development vehicle. After a short break, BSC’s team members Filippo Mantovani and Roger Ferrer Ibáñez closed the tutorial with a session on Bringing up EPI RISC-V Vector architecture Software, with a demonstration on software-emulated vector instruction explorations for RISC-V-based accelerator.

Materials and presentations from EPI’s sessions are available in our Dissemination repository:

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