Edge System and Use Cases

Emerging applications stream

EPI’s ambitious goal is to set an architecture suitable for different applications. In SGA2, new emerging applications will be studied. In SGA2, a new emerging applications will be studied: Autonomous HPC with use cases deployed on the edge. But this application is considered in continuum computing from Autonomous HPC on edge to performant HPC nodes in data center.

Autonomous HPC

The main objective is to demonstrate the capability of EPI architecture for Autonomous HPC use cases. This demonstration will be done first on one of the previously selected use case: the Video Surveillance for smart city and infrastructures.

The goal of these explorations is to find and optimize the HPC scaling path to fit with the compelling constraints of the (high volume) embedded market, by evaluating, analysing and profiling these use cases against the target HPC processors. This work will be done on the simulation tool chains of all the platforms developed in SGA2. The chip architecture’s requirements will be achieved through expertise for the extraction of the key algorithms from the target application, including security, energy efficiency and ease of deployment requirements. The architectural exploration, based on the kernel computation requirements and the configurable parameters provided by the simulation tools will push through the best “scale-to-fit” of the HPC processors and RISC-V accelerator down to the embedded solutions. The vector and ML accelerators developed in Stream 3 will also be evaluated on real time video surveillance application, to propose extensions to meet the real time constraints with increasing data size.

Moreover, software libraries will be developed to support federated/distributed training and inference of DNNs and feature extraction algorithms for video-based applications for massive surveillance. As such application requires a full scale HPC processor from edge up to the central HPC cloud, co-design with the other streams will define and properly tune all the parameters required.

EPI-Based HPC Blades

For continuum computing, the applications on Edge must be able to exchange with HPC servers. Then the EPI-based blade developed for HPC must provide the adequate network interface for connection to edge network.

HPC Vendors and HPC end-users will analyse how EPI technologies fit in the HPC market and propose valuable HPC products based on General Purpose processor Rhea2 or accelerators developed in SGA2. The different proposals must meet standard HPC requirements, with a focus on security, but also new requirements such as training phase in machine learning for emerging application.

Several scenarios will be analysed for high-speed interconnect between HPC nodes, as interconnect is essential to meet expected performances of HPC Product. The best technology and topology will be selected from the needed bandwidth and latency. The connection of the HPC nodes to the rest of the datacentre and to the autonomous HPC servers will also be carefully analysed.

The next step is, for few nodes defined in the first step, to study the feasibility to implement them in a blade in one standard HPC form factor. This form factor is the OpenSequana one, that is compatible with the BullSequana XH3000 cabinet from Atos.

One type of node will be selected according to the interest of the SGA2 partners and to the feasibility study, and a pre-study of this blade will start using the Rhea2 reference design developed in Stream 2, with a focus on a new water-cooled heatsink for Rhea2, compatible with the OpenSequana interface.




Live News

We had a great time at the #EuroHPCSummit2023 in Sweden! 🦾 Thank to all of you who visited us at the poster session and who attended session with Mario Kovač (@HPCfer) in organisation with @Etp4HPC 😁 https://t.co/8XA0DJ8Lem
24/03/2023 12:10 pm
The summer school addresses young computer science researchers and engineers and is open to outstanding MSc students. Accepted students will spend one week in Barcelona, attending formal lectures, invited talks, and other activities. 🤓
23/03/2023 2:32 pm
.@TheOfficialACM Summer School on HPC Computer Architectures for AI and Dedicated Applications, co-hosted by @BSC_CNS and @la_UPC invites you to register until April 15th! ⏰ More about the summer school and registrations here ⬇️ https://t.co/cEsATZLEYs
23/03/2023 2:31 pm
RT @Etp4HPC: Our 2nd session of the afternoon is starting at #EuroHPCSummit2023 with Mario Kovac from @EuProcessor We're in room 3, join u…
22/03/2023 4:01 pm
The #EuroHPCSummit2023 is finally here! 🦾 We look forward to interesting discussions and seeing our colleagues who work on interesting projects. Don't forget to visit us today at the project poster session! 😁 https://t.co/FNr0XdObOy
20/03/2023 12:47 pm
📣 Join us in the project poster session at #EuroHPCSummit2023! Learn more about our project and our plans for the future. We look forward to seeing you in Sweden in just 4 days! 💪 https://t.co/LwKqECp1Zm
16/03/2023 11:04 am
Mario Kovač (@HPCfer) will have a keynote speech related to the EPI project today at HPC, Data & Architecture Week in Buenos Aires, Argentina. 🇦🇷 More information about the event here ➡️ https://t.co/Uc2EFDRUrK
13/03/2023 11:31 am
RT @Etp4HPC: 1 week to #EuroHPCSummit2023 ! Don’t miss the 2 sessions run by ETP4HPC on 22 March: 14:30 Emerging Technologies for HPC in Eu…
13/03/2023 9:47 am
The @EuroHPC_JU Summit is approaching! Mario Kovač from @HPCfer will participate in a session "Towards an Autonomous European HPC Supply Chain: Showcasing EuroHPC Projects." EPI will also be present in the poster session. ➡️ https://t.co/vSHGUsc6Gj See you in Sweden! 🇸🇪
06/03/2023 8:40 am
📢 EPI will be a sponsor of the 2023 edition of @TheOfficialACM Summer School on HPC Computer Architectures for AI and Dedicated Applications, co-hosted by @BSC_CNS and @la_UPC. More about the summer school and registrations here 👇 https://t.co/cEsATZLEYs
01/03/2023 1:51 pm

3 new R&I projects to boost the digital sovereignty of Europe

The European High Performance Computing Joint Undertaking (EuroHPC JU) has launched 3 new research and innovation projects. The projects aim to bring the EU and its partners in the EuroHPC JU closer to developing independent microprocessor and HPC technology and advance a sovereign European HPC ecosystem. The European Processor Initiative (EPI SGA2), The European PILOT […]

Successful conclusion of European Processor Initiative Phase One

The European Processor Initiative (EPI) has successfully completed its first three-year phase, delivering cutting-edge technologies for European sovereignty on time and within a limited budget, despite the constraints of the COVID-19 pandemic Highlights include the Rhea general-purpose processor, EPI accelerator proof of concept and embedded high-performance microcontroller for automotive applications The successful completion of this […]

EPI EPAC1.0 RISC-V Test Chip Samples Delivered

Another step closer to demonstrate the capabilities of a RISC-V based European microprocessor The European Processor Initiative (EPI) https://www.european-processor-initiative.eu/, a project with 28 partners from 10 European countries, with the goal of making EU achieve independence in HPC chip technologies and HPC infrastructure, is proud to announce that EPAC1.0 RISC-V Test Chip samples were delivered […]

Eric Monchalin is the new Chairman of the EPI Board

General Assembly of European Processor Initiative has selected a new Chairman of the Board in July. Eric Monchalin from Atos, the company that coordinates the EPI project, is going to lead 28 partners from 10 countries in their efforts to design and implement a roadmap for a new family of low-power European processors. Eric is […]

EuroHPC JU regulation published in the Official Journal of the European Union

Regulation on EuroHPC JU establishment adopted

EPI to take centre stage at the ACM Europe Summer School on HPC Computer Architectures for AI and Dedicated Applications

Taking place on 30 August – 3 September 2021, the second ACM Europe Summer School on HPC Computer Architectures for AI and Dedicated Applications will be co-hosted by Barcelona Supercomputing Center (BSC), in conjunction with the Universitat Politècnica de Catalunya – Barcelona Tech (UPC). The programme of this year’s summer school, which will be fully […]

EPI EPAC1.0 RISC-V Test Chip Taped-out

European Processor Initiative has successfully released EPAC1.0 Test Chip for fabrication

Infineon’s Knut Hufeld Discusses Automotive Developments in EPI

Knut Hufeld, Senior Director R&D with Infineon and an Automotive Stream representative in EPI, talked about the developments in the stream with Ralf Hartmann. 

EPI EPAC1.0 RISC-V core boots Linux on FPGA

EPI team successfully boots Linux on our EPAC 1.0 core subset implemented on FPGA.

EPI team at HiPEAC 2021

EPI team participated in several activities at HIPEAC2021.
Our website uses cookies to give you the most optimal experience online by: measuring our audience, understanding how our webpages are viewed and improving consequently the way our website works, providing you with relevant and personalized marketing content. You have full control over what you want to activate. You can accept the cookies by clicking on the “Accept all cookies” button or customize your choices by selecting the cookies you want to activate. You can also decline all cookies by clicking on the “Decline all cookies” button. Please find more information on our use of cookies and how to withdraw at any time your consent on our privacy policy.
Accept all cookies
Decline all cookies
Privacy Policy