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General Purpose processor development
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GPP Stream

Exascale computation systems will need to simultaneously meet challenges related to performance, system cost, and energy efficiency. To deliver performance, a vast amount of resources is required, but the wrong choices of components, architecture, or implementation might result in a system which is much too expensive and too power-hungry. To find the right balance, global system level optimization is necessary.

EPI, therefore, intends to share a strong set of common technology across different application domains. Starting from the selection of cutting-edge process technology, a low-power design approach ranges from massive parallelism, specialized architecture, low-voltage operating point, and fine grain power management. The software stack will be designed to integrate and take advantage of these features to achieve high-energy efficiency and maximize performance across a wide range of layers from the low-level firmware, all the way up to system software and application run-times. For this purpose, EPI will harmonize the heterogeneous computing environment by defining a common approach: the so-called Common Platform (CP). It will include the global architecture (hardware and software) specification, common design methodology, and global approach for power management and security.


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The CP is organized around a 2D-mesh Network-on-Chip (NoC) connecting computing tiles based on high-performance general-purpose CPU core with built-in FPU acceleration and specialized application-accelerators with different acceleration levels designed within EPI project.

A common software environment between heterogeneous computing tiles will harmonize the system as well as acting as a common backbone of IP components for IO connection with the external environment such as memories and interconnected or loosely coupled accelerators. With this CP approach, EPI will provide an environment that seamlessly integrates any computing tile. The right balance of computing resources for application matching will be defined through the ratio of the accelerator and general-purpose tiles.

EPI embedded FPGA eFPGA

The eFPGA tile, which is integrated into the General Purpose Processor chip (GPP), contributes to an energy-efficient allocation of the necessary performance by an optimal interaction with the main CPU and the dedicated Hardware accelerators.

Menta eFPGA IP is optimized for general purpose HPC and automotive applications such as image-processing using machine learning (ML). It allows post-production functions like customer customization and proprietary elements. In addition, it can consider emerging security aspects, like run-time reconfigurable crypto and post-quantum public crypto accelerators.

The eFPGA core plays a key role in an optimal hardware/software codesign system, enabling reconfiguration options for the next generation of the European HPC and automotive industry.

Hardware acceleration features are moved on-chip, without the limitations or overhead due to I/O pad-count or chip-to-chip communication interfaces. The eFPGA core is provided to EPI customers with the corresponding programming software-tool, Origami Programmer, which generates the bitstream that targets and optimizes RTL to the needs of Menta eFPGA architecture. The technology does not rely on third-party software tools, which target generic FPGA architecture and thus deliver suboptimal results.

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Live News

25/11/2020 7:50 pm
Supercomputing may be over, but our November still has some conference-y gems! 💎 Another DL at IEEE Sensors by @Unipisa's Sergio Saponara, and then a #PhD #workshop, with UNIPI, @BSC_CNS Jesus Labarta and @NUSingapore's John Gustafson! 😎 Look here👇 https://t.co/mQy6TuqZhI
24/11/2020 9:03 am
Working towards a common goal: 🇪🇺 ["exascale machine with a European tech footprint,and to provide HPC access to researchers in every participating European country; ensure that HPC experience is raised in countries that haven’t been in a position to do this adequately before."] https://t.co/RMcNsBZ7Jr
19/11/2020 2:50 pm

EPI and European Exascale Projects at Supercomputing

European Processor Initiative and EU exascale projects will share a virtual booth at Supercomputing2020.
2020-11-02
Second day of #exhibition at @Supercomputing, our teammates from @istecnico and @fer_unizg are starting our day at EPI's virtual booth, ready to chat with you! 🤗 Link to booth 👉 https://t.co/n7R8lzzcwC Link to our entire schedule 👉https://t.co/zO60YMufgt
18/11/2020 2:26 pm
Tomorrow, ApplePies is starting! Our colleague, Sergio Saponara from @Unipisa is General Chair, while another EPI team member, John Davis from @BSC_CNS, is giving a keynote titled "#RISCV, Enabling a Wide-Open #FutureOfHPC". See you there! 😎 https://t.co/BtCi60OI0X
18/11/2020 9:02 am
Jesus Labarta from @BSC_CNS is about to give his lecture "The RISC-V vector processor in EPI" at our #SC20 booth, hurry and join: https://t.co/Xv3FCx1RE7! @risc_v
17/11/2020 5:27 pm
Drop in at our #SC booth tomorrow: https://t.co/n7R8lzQNVc to hear our @BSC_CNS expert, Jesus Labarta, with his presentation titled "The #RISCV vector processor in EPI" 🎙️at 12 - 1 pm EST, 📆Nov 17th, 2020 https://t.co/zO60YMLQF3
16/11/2020 11:15 am
Tomorrow, the exhibition at #SC20 starts. Check out the schedule, when to talk to booth representatives of each project. Come on over for a chat! 😃☕️ https://t.co/pN0mwVcmeI
16/11/2020 8:35 am
@mnoukhiya @HPC_Guru @kehoste @F_Tessier @hpcnotes @mangoEU We hang out with the crew from @mangoEU a LOT! Can it be that the Guru has been right under our nose this whole time? 🧐😱 ##MangoesAsAService
11/11/2020 11:06 am
Thank you for following our progress! 🥳 https://t.co/wZoXuoiZ0O
10/11/2020 4:59 pm

European Processor Initiative: Second year of activities

The European Processor Initiative https://www.european-processor-initiative.eu/, a project with 27 partners from 10 European countries, with the goal of helping the EU achieve independence in HPC technologies, is finishing its second year of activities. The project is unveiling an updated roadmap and announcing a virtual booth at Supercomputing.
2020-11-09

Jean-Marc Denis at Korea Supercomputing Conference 2020

Jean-Marc Denis, EPI's Chairman of the Board, was invited to KSC20 as a keynote speaker with a talk titled "The European approach for exascale ages. The road toward sovereignty”.
2020-09-24

EC Sets New Ambition for Supercomputing

Ursula von der Leyen said EC would invest 8 billion € into supercomputers.
2020-09-21

EPI @ ESIWACE Virtual Workshop

Jean-Marc Denis and Jesus Labarta presented at the ESIWACE virtual workshop.
2020-07-06

V for vector: software exploration of the vector extension of RISC-V

Introduction The European Processor Initiative (EPI) is building a new central processing unit (CPU) with European technology. This CPU will bundle an accelerator, based on the open source RISC-V architecture. This accelerator will include support for the upcoming V-extension of RISC-V. At the Barcelona Supercomputing Center (BSC), we have been busy at work building software […]
2020-05-05

First EPI Forum to take place in Paris

The European Processor Initiative is announcing the first EPI Forum to take place in Paris, France, on March 16-17, 2020. In a two-day event, the consortium will host experts from HPC ecosystem, engineers, researchers and global players in the field, to attend sessions, round tables and keynote speeches from prominent executives and experts.
2020-02-25

EPI @ HiPEAC in Bologna

EPI team attended HiPEAC conference in Bologna.
2020-01-29

SiPearl, Industrial hand of EPI launches

SiPearl, EPI’s industrial and business hand, joins the EPI consortium as its 27th partner and moves into its operational phase. SiPearl and its solutions will help drive the development of the European market for high-performance computing (HPC), as well as its strategic applications such as artificial intelligence and connected mobility. SiPearl will develop and market […]
2020-01-23

European Processor Initiative: First year of activities

The project is finishing its first year with introduction of a new EPI Common Platform, an updated roadmap and presence at key events
2019-11-04
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