General Purpose Processor

GPP Stream

Exascale computation systems will need to simultaneously meet challenges related to performance, system cost, and energy efficiency. To deliver performance, a vast amount of resources is required, but the wrong choices of components, architecture, or implementation might result in a system which is much too expensive and too power-hungry. To find the right balance, global system level optimization is necessary.

EPI, therefore, intends to share a strong set of common technology across different application domains. Starting from the selection of cutting-edge process technology, a low-power design approach ranges from massive parallelism, specialized architecture, low-voltage operating point, and fine grain power management. The software stack will be designed to integrate and take advantage of these features to achieve high-energy efficiency and maximize performance across a wide range of layers from the low-level firmware, all the way up to system software and application run-times. For this purpose, EPI will harmonize the heterogeneous computing environment by defining a common approach: the so-called Common Platform (CP). It will include the global architecture (hardware and software) specification, common design methodology, and global approach for power management and security.

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The CP is organized around a 2D-mesh Network-on-Chip (NoC) connecting computing tiles based on high-performance general-purpose CPU core with built-in FPU acceleration and specialized application-accelerators with different acceleration levels designed within EPI project.

A common software environment between heterogeneous computing tiles will harmonize the system as well as acting as a common backbone of IP components for IO connection with the external environment such as memories and interconnected or loosely coupled accelerators. With this CP approach, EPI will provide an environment that seamlessly integrates any computing tile. The right balance of computing resources for application matching will be defined through the ratio of the accelerator and general-purpose tiles.




Live News

RT @Etp4H: #EHPCSW is officially closed but work continues in Poznan with our SRA 4 workshop. 1st speaker is @JeanMarc_Denis @EuProcessor.…
17/05/2019 6:51 am
RT @exdci_eu: "The future of #HPC stands in integration technology" for Denis Dutoit #EHPCSW @CEA_Officiel @EuProcessor…
16/05/2019 3:55 pm
Denis Dutoit explainig heterogeneity within EPI, at #EHPCSW @CEA_Officiel
16/05/2019 3:42 pm
If you're around at #EHPCSW, go see EPI's Denis Dutoit from @CEA_Officiel tackle heterogeneous integration!
16/05/2019 3:23 pm
Michael Malms from @Etp4H explaining the next SRA. We're glad to see EPI 'in the picture'! #EHPCSW #h2020
16/05/2019 3:02 pm
RT @exdci_eu: "Some results of the @fet_eu #HPC projects will be used for the @EuProcessor". JF Lavignon concludes its presentation at #EHP…
16/05/2019 1:32 pm
@ico_TC @frplay @jangray @BSC_CNS @risc_v @EuroHpc EPI welcomes innovative and compelling technologies. SMEs can send us their value proposal at
16/05/2019 9:44 am

EPI at Supercomputing Asia

Jean-Marc Denis, Chairman of the Board of the European Processor Initiative, attended the Supercomputing Asia event in Singapore, at the Suntec Singapore Convention and Exhibition Centre, presenting EPI activities and efforts. Visitors to SC Asia could also find out more about EPI’s goals and roadmap by visiting the European Commission booth, which graciously hosted EPI […]
Panel debating about Co-Design approach for system and hardware architecture @fz_juelich @BSC_CNS @Atos #HPC #EHPCSW #codesign
15/05/2019 3:40 pm
Panel of the co-design workshop has started! #EHPCSW #EPI4HPC
15/05/2019 3:11 pm
EPI's Jesus Labarta from @BSC_CNS presents the challenges of software at the exascale level #HPC #EPI4HPC #Exascale
15/05/2019 2:06 pm

EPI Presented at Barcelona RISC-V Workshop

Prof. Mateo Valero, director of the Barcelona Supercomputing Center, presented the European Processor Initiative in RISC-V Workshop, Barcelona 7-10 May, 2018. His keynote focused on the role of RISC-V architecture in the EPI project and in future exascale computing systems in general. Video is available here

European Processor Initiative kicks off in Brussels

Consortium partners of the European Processor Initiative (EPI) met in Brussels on December 18th and 19th 2018 to kick off the project that will be the cornerstone of EU’s strategic plans in High-Performance Computing. The Initiative gathers 26 partners from 10 European countries with the aim of bringing to the market a low-power microprocessor and […]

EPI presented in HPC User Forum, Detroit 2018

Jean-Marc Denis, HPC International Business Director at Bull, the EPI consortium coordinator, presents EPI at HPC User Forum in Detroit.

European Processor Initiative announced on European Commission website

The European Commission published an official announcement of the European Processor Initiative (EPI) on its website. The announcement confirmed there are 23 partners in the project and the budget amounts to 120 million euro. Take a look at the EC announcement


Philippe Notton, General Manager of the European Processor Initiative, gave a presentation on EPI activities and efforts in Versailles, December 5th2018, attending the SIA CESA 5.0 International Conference and Exhibition. Presenting EPI goals, Mr Notton explained the core ideas behind EPI project and its overall line-up with European strategic goals set out in EuroHPC JU. […]


Philippe Notton, General Manager of the European Processor Initiative, gave a presentation on EPI activities and efforts in Lisbon, November 21st 2018, attending the European Forum for Electronic Components and Systems. Presenting EPI goals, Mr Notton explained the core ideas behind EPI project and its overall line-up with European strategic goals set out in EuroHPC […]

EPI CIO Applications Europe

Article written by prof. dr. sc. Mario Kovač, Dissemination Leader of the European Processor Initiative, has been published on CIO Applications Europe. The article introduces EPI’s goals and efforts in tackling global challenges and potential European responses to HPC-related activities. Read the whole article about “Changing Approaches to HPC Systems