Manticore: A 4096-core RISC-V Chiplet Architecture for Ultra-efficient Floating-point Computing

EPI Consortium members published “Manticore: A 4096-core RISC-V Chiplet Architecture for Ultra-efficient Floating-point Computing” in IEEE Micro.

Here you can find a link to an open access version of the article:

https://arxiv.org/abs/2008.06502

DOI: https://doi.org/10.1109/MM.2020.3045564

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Publication Type: Journal Article

Year of Publication: 2020

Authors: Fabian Schuiki - Florian Zaruba - Luca Benini

Publisher: IEEE

Name of publication/Event:

ISSN Number: Electronic ISSN: 1937-4143

Keywords: FPU, RISC-V

URL:

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Manticore: A 4096-core RISC-V Chiplet Architecture for Ultra-efficient Floating-point Computing

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