EPI Consortium members published “NTT Architecture for a Linux-Ready RISC-V Fully-Homomorphic Encryption Accelerator” in IEEE Transactions on Circuits and Systems I: Regular Papers.
Here you can find a link to an open access version of the article: https://ieeexplore.ieee.org/document/9763876.
Roger Espasa (Semidynamics) held a presentation at HiPEAC 2022 Conference in Budapest.
John D. Davis from BSC held a talk titled “RISC-V in Europe: The Road to an Open Source HPC Stack.”
Jesús Labarta (BSC) held a presentation titled “RISC-V vector processor in EPI (European Processor Initiative).”
Francesco Minervini and Oscar Palomar Perez from BSC presented the RISC-V vector accelerator at RISC-V Summit 2021. Their talk was titled Vitruvius: An Area-Efficient RISC-V Decoupled Vector Accelerator for High Performance Computing.
Roger Espasa from Semidynamics held a presentation titled “OVI: The Open Vector Interface.”
EPI Consortium members published “A Lightweight Posit Processing Unit for RISC-V Processors in Deep Neural Network Applications” in IEEE Transactions on Emerging Topics in Computing.
Here you can find a link to an open access version of the article: https://ieeexplore.ieee.org/document/9583876.