EPI team attended the Supercomputing conference in Denver, with its own exhibition booth and four more shared partners’ booths exhibiting EPI materials. In addition to that, EPI representatives held several presentations and invited talks:
At the Arm User Group meeting, Yingchih Yang from Atos presented the EPI Design Updated, while Dirk Pleiter from Julich presented “Linear algebra on Arm-based platforms: From Neon to SVE”. EPI Chairman of the Board, Jean-Marc Denis attended the ETP4HPC BoF with an invited talk, and also the ASC HPC Connection Workshop with a talk titled “Recent Developments on EPI Program”.
At the 2nd RISC-V Meetings, organized by IRT Nanoelec and CEA and The Scientific Day of IRT SE & GDR SOC2: RISC-V for critical embedded systems, organized by IRT St-Exupéry and GDR SOC2, EPI partners held two presentations.
The first one made by Romain Dolbeau, who gave a talk titled “European Processor Initiative: challenges & opportunities for RISC-V accelerators in an HPC platform”, is available upon request due to file size. The second, done by Denis Dutoit, is available for download here. Ater an introduction on High Performance Computing new challenges and associated technology/architecture evolution, the presentation highlighted the EPI position statement on generic computing, accelerator with RISC-V and design methodology. The presentation concluded with an explanation of EPI’s roadmap towards a wide range of applications from Exascale computing to embedded HPC.
The Spanish Supercomputing Network (RES) organizes every year a users meeting to inform about RES resources and procedures. This event aims to be a discussion forum among RES users, technical staff, the access committee and the users’ committee. Barcelona Supercomputing Center Director, Mateo Valero, attended the event and updated the public about MareNostrum 5 supercomputer and EPI efforts.
An Update on the European Processor Initiative
EPI First tutorial called “First steps towards a made-in-Europe high-performance microprocessor” was held on July 17th, at the Universita Politècnica de Catalunya, co-located with the ACM 2019 Summer school on HPC architectures for AI and dedicated applications. Andrea Bartolini presented the introductory section, covering several aspects of the HPC processor landscape.