EPI Consortium members published “Software Development Vehicles to Enable Extended and Early Co-design: A RISC-V and HPC Case of Study” at ISC High Performance 2023: High Performance Computing.
Here you can find a link to an open access version of the article: https://arxiv.org/abs/2306.01797
DOI: https://doi.org/10.1007/978-3-031-40843-4_39
Presentation from the conference is also available below in .pdf.
EPI Consortium members published “Supporting RISC-V Performance Counters Through Linux Performance Analysis Tools” at 2023 IEEE 34th International Conference on Application-specific Systems, Architectures and Processors (ASAP).
Here you can find a link to an open access version of the article: https://ieeexplore.ieee.org/abstract/document/10265733
EPI Consortium members published “A Hardware-Centric Approach to Increase and Prune Regular Activation Sparsity in CNNs” at the 2023 IEEE 5th International Conference on Artificial Intelligence Circuits and Systems (AICAS).
Here you can find a link to the article: https://ieeexplore.ieee.org/document/10168566
$400m RISC-V design centre for Barcelona
Indigenous HPC: What It Means and Why Now
Joined up thinking: Europe to oversee trio of projects for homegrown chips, HPC gear
EuroHPC Launches 3 New Research and Innovation Projects
E4 Contributes to the Success of the European Processor Initiative
