Automotive Stream

One of EPI’s core activities will focus on the automotive sector. The stream activities are targeting main trends driving innovation in the automotive industry including the introduction of autonomous driving (levels 4/5) and the Connected Car infrastructure – because without innovative solutions, the digital progress in the automotive sector would end in a deadlock due to insufficient computing power for new and increasing fields of application like 360-degree environment recognition and other real-time systems.

In order to continue on the road of success, the initiative aims at implementing suitable high-performance processors for the HPC sector. The specific challenge in the automotive sector is the integration of those high-performance processors that have to be compliant with the relevant application and environmental requirements in that real-time domain.

Most importantly, adapting and using HPC processors must not have a negative impact under any circumstances on the function, the real-time behavior, the availability and reliability of the automotive compute platform. Furthermore, in the extremely cost-driven automotive sector, a number of relevant standards must be observed. Obviously, the use of complex and costly solutions like active cooling should be avoided.

The fundamental approach in favour is a master-slave constellation with automotive-qualified processors operating as masters and high-performance computing general-purpose processors (HPC-GPP) and accelerators operating as slaves.

With respect to the HPC domain, one of the incentive reasons to adapt the HPC general-purpose processor is expected better exploitation of the highly expensive development of such a complex general-purpose processor. From the automotive viewpoint, in turn, the expected additional computing power should not exceed given cost and energy budgets.

This is where EPI comes into play, providing architectural solutions for a novel embedded high-performance computing (eHPC) platform. A proposed subsequent integration of the HPC general-purpose processors and HPC accelerators into the automotive eHPC is supposed to be technologically, functionally and economically successful.

In any case, it will be crucial because new autonomous vehicle network architectures require computing platforms enabling the execution of extremely complex vehicle perception algorithms. The latter include sensor/imaging processing, data fusion, environment sensing and modeling, low-latency deep machine learning for object classification and behavior prediction with seamless, dependable and secure interaction between mobile high-performance embedded computing, and stationary server-based high-performance computing.

Accelerator for the Automotive Stream MPPA

The objective of the EPI automotive stream is to support Autonomous Driving Systems (ADS) based on a mainstream automotive safety/security MCU and two or more ‘number crunchers’ derived from the General Purpose Processor (GPP). Each ‘number cruncher’ will implement the perception and path planning functions. As the GPP is based on Arm cores, it provides high performances for 64-bit and 32-bit floating-point computations. These are applicable to the path planning functions of ADS. The GPP also embeds compuzte units dedicated to acceleration, in particular the MPPA tiles for vechile perception. Key vehicle perception functions include: sensor data segmentation and fusion; object detection and tracking; coupling with the localization functions. These functions require an integrated mix of CPU, GPU and NPU (neural procesing unit) capabilities, while meeting the soft real-time constraints of the AUTOSAR Adaptive standard.

The MPPA accelerator tile shown here is developed for vehicle perception in the EPI Automotive Stream. This tile is based on the compute unit (‘compute cluster’) of the Karlay MPPA3 processor. Indeed, the MPPA processors already excel at vehicle image processing, bit-level processing, and deep learning inference. They are fully programmable in C/C++/OpenMP under GCC or LLVM, and are able to host RTPS, SMP POSIX and Linux operating systems. Other tools include a deep learning compiler that produces highly optimized code from trained neural networks provided under the standard Caffe, TensorFlow and ONNX formats. In the EPI Automotive Stream, the MPPA3 processor will be used in the Intermediate Refernece Platform (IRP) to support sofware development and performance analysis of ADS functions until the first iteration of the GPP is available.




Live News

@pulp_platform Bianca, always the looker! ❤️
04/06/2021 12:43 pm
[PRESS RELEASE] 📢 EPI is proud to announce that we have successfully released #EPAC 1.0 Test Chip for #fabrication! 😀🙌 Read all about it here:
01/06/2021 6:02 am

EPI EPAC1.0 RISC-V Test Chip Taped-out

European Processor Initiative has successfully released EPAC1.0 Test Chip for fabrication
This Friday, an online #Cybersecurity in #Automotive workshop will be organized by the Department of Engineering from the @Unipisa EPI team! Register to attend here:!
19/05/2021 8:49 am
@pulp_platform We're late to the congratulations, but still, bravo Stefan! 🎉🎯
03/05/2021 8:58 am
Don't miss the ceremony! 🎉
03/05/2021 8:56 am
Our friends from @Evolve_H2020 are working on the "Evolve Ecosystem – The European Network for Evolve’s Large-Scale Testbed”! Check it out here 👉 and subscribe!
23/04/2021 7:48 am
Mont-Blanc project ends today, but the results of their work most certainly do not! Thank you for all the hard work! 👏🏻
31/03/2021 7:03 am
@MontBlanc_Eu @Arm @Atos @Kalrayinc Thank you for all the great things you've done and congratulations ✅⚡👏🏻
31/03/2021 7:01 am
Don't forget 👉📢 #RISCV Week is starting today: RISC-V meeting and #OpenHW Day, with several of our colleagues participating! @risc_v @UniboMagazine @ETH_en @SIPEARL_SAS @BSC_CNS @semidynamics
30/03/2021 6:46 am
The #EHPCSW is starting! On Thursday, our team from @e4company, @UniboMagazine, and @Cineca1969 will attend the Science Day and discuss the topic titled HW/SW #codesign for #EnergyEfficiency and Performance: Charting the Path towards #Exascale Computing!
22/03/2021 10:20 am

Infineon’s Knut Hufeld Discusses Automotive Developments in EPI

Knut Hufeld, Senior Director R&D with Infineon and an Automotive Stream representative in EPI, talked about the developments in the stream with Ralf Hartmann. 

EPI EPAC1.0 RISC-V core boots Linux on FPGA

EPI team successfully boots Linux on our EPAC 1.0 core subset implemented on FPGA.

EPI team at HiPEAC 2021

EPI team participated in several activities at HIPEAC2021.

EPI and European Exascale Projects at Supercomputing

European Processor Initiative and EU exascale projects will share a virtual booth at Supercomputing2020.

European Processor Initiative: Second year of activities

The European Processor Initiative, a project with 27 partners from 10 European countries, with the goal of helping the EU achieve independence in HPC technologies, is finishing its second year of activities. The project is unveiling an updated roadmap and announcing a virtual booth at Supercomputing.

Jean-Marc Denis at Korea Supercomputing Conference 2020

Jean-Marc Denis, EPI's Chairman of the Board, was invited to KSC20 as a keynote speaker with a talk titled "The European approach for exascale ages. The road toward sovereignty”.

EC Sets New Ambition for Supercomputing

Ursula von der Leyen said EC would invest 8 billion € into supercomputers.

EPI @ ESIWACE Virtual Workshop

Jean-Marc Denis and Jesus Labarta presented at the ESIWACE virtual workshop.

V for vector: software exploration of the vector extension of RISC-V

Introduction The European Processor Initiative (EPI) is building a new central processing unit (CPU) with European technology. This CPU will bundle an accelerator, based on the open source RISC-V architecture. This accelerator will include support for the upcoming V-extension of RISC-V. At the Barcelona Supercomputing Center (BSC), we have been busy at work building software […]