Automotive Stream

One of EPI’s core activities will focus on the automotive sector. The stream activities are targeting main trends driving innovation in the automotive industry including the introduction of autonomous driving (levels 4/5) and the Connected Car infrastructure – because without innovative solutions, the digital progress in the automotive sector would end in a deadlock due to insufficient computing power for new and increasing fields of application like 360-degree environment recognition and other real-time systems.

In order to continue on the road of success, the initiative aims at implementing suitable high-performance processors for the HPC sector. The specific challenge in the automotive sector is the integration of those high-performance processors that have to be compliant with the relevant application and environmental requirements in that real-time domain.

Most importantly, adapting and using HPC processors must not have a negative impact under any circumstances on the function, the real-time behavior, the availability and reliability of the automotive compute platform. Furthermore, in the extremely cost-driven automotive sector, a number of relevant standards must be observed. Obviously, the use of complex and costly solutions like active cooling should be avoided.

The fundamental approach in favour is a master-slave constellation with automotive-qualified processors operating as masters and high-performance computing general-purpose processors (HPC-GPP) and accelerators operating as slaves.

With respect to the HPC domain, one of the incentive reasons to adapt the HPC general-purpose processor is expected better exploitation of the highly expensive development of such a complex general-purpose processor. From the automotive viewpoint, in turn, the expected additional computing power should not exceed given cost and energy budgets.

This is where EPI comes into play, providing architectural solutions for a novel embedded high-performance computing (eHPC) platform. A proposed subsequent integration of the HPC general-purpose processors and HPC accelerators into the automotive eHPC is supposed to be technologically, functionally and economically successful.

In any case, it will be crucial because new autonomous vehicle network architectures require computing platforms enabling the execution of extremely complex vehicle perception algorithms. The latter include sensor/imaging processing, data fusion, environment sensing and modeling, low-latency deep machine learning for object classification and behavior prediction with seamless, dependable and secure interaction between mobile high-performance embedded computing, and stationary server-based high-performance computing.

Accelerator for the Automotive Stream MPPA

The objective of the EPI automotive stream is to support Autonomous Driving Systems (ADS) based on a mainstream automotive safety/security MCU and two or more ‘number crunchers’ derived from the General Purpose Processor (GPP). Each ‘number cruncher’ will implement the perception and path planning functions. As the GPP is based on Arm cores, it provides high performances for 64-bit and 32-bit floating-point computations. These are applicable to the path planning functions of ADS. The GPP also embeds compuzte units dedicated to acceleration, in particular the MPPA tiles for vechile perception. Key vehicle perception functions include: sensor data segmentation and fusion; object detection and tracking; coupling with the localization functions. These functions require an integrated mix of CPU, GPU and NPU (neural procesing unit) capabilities, while meeting the soft real-time constraints of the AUTOSAR Adaptive standard.

The MPPA accelerator tile shown here is developed for vehicle perception in the EPI Automotive Stream. This tile is based on the compute unit (‘compute cluster’) of the Karlay MPPA3 processor. Indeed, the MPPA processors already excel at vehicle image processing, bit-level processing, and deep learning inference. They are fully programmable in C/C++/OpenMP under GCC or LLVM, and are able to host RTPS, SMP POSIX and Linux operating systems. Other tools include a deep learning compiler that produces highly optimized code from trained neural networks provided under the standard Caffe, TensorFlow and ONNX formats. In the EPI Automotive Stream, the MPPA3 processor will be used in the Intermediate Refernece Platform (IRP) to support sofware development and performance analysis of ADS functions until the first iteration of the GPP is available.




Live News

Have a look at what our @_abartolini_ talked about with @NicoleHemsoth regarding #RISCV and #HPC 👇👀
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RT @pulp_platform: This Wednesday and Thursday at 9:00, Luca and Frank will be giving a talk on how to work with RISC-V, as part of ACACES…
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Jean-Marc Denis and Jesus Labarta presented at the ESIWACE virtual workshop.
Another addition to @SIPEARL_SAS 👏. Welcome, Frédéric!
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Are you attending? 😀 The webinar will cover things like: 🧩intelligent platforms and Edge Computing 🧩innovative and scalable "manycore" HW and SW 🧩an optimal solution for parallel processing of several independent applications 🧩industrial and automotive application 👇
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RT @SIPEARL_SAS: "High-performance computing benefits from #European support, and the #EU has established a roadmap to regain sovereignty f…
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The 34th ACM International Conference on Supercomputing (ICS-2020), the premier international forum for the presentation of #ResearchResults in #HPC systems, started today as an online event for the first time ever: @BSC_CNS
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@Pa0x73cal @pulp_platform We think @_abartolini_ should tell us 👉🏻🍝? 😂
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@pulp_platform We have it on good authority there is a revelation of a secret Bolognese recipe in the middle of the tutorial 😂🤏🏻🍝
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RT @EuroHPC_JU: Join our efforts to complete the 🇪🇺 European #HPC supply value chain & develop a world-class #supercomputing ecosystem in #…
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A valuable addition to @SIPEARL_SAS! 👏🏻
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