The European Processor Initiative (EPI), crucial element of the European exascale strategy, delivers its first architectural design to the European Commission and welcomes new partners

Almost six months in, the project that kicked off last December has already delivered its first architectural designs to the European Commission, thus marking initial milestones successfully executed. The project that will be the cornerstone of the EU’s strategic plans in HPC initially brought together 23 partners from 10 European countries, but has now welcomed three more strong additions to its EPI family.

EPI consortium aims to bring a low-power microprocessor to the market and ensure that the key competences for high-end chip design remain in Europe. The European Union’s Horizon 2020 program funds this project with a special Framework Partnership Agreement. The initial stage is a three-year Specific Grant Agreement, which lasts until November 2021.

The EPI consortium includes experts in all the relevant areas for such a major undertaking: the High-Performance Computing research community, major supercomputing centres, the computer system, automotive, and silicon industry, as well as the potential scientific and industrial users. Through a co-design approach, EPI will design and develop the first European HPC System for the HPC and automotive markets through several major streams of operation:

• HPC general purpose processor
• Accelerator
• Automotive platform

The Initiative is part of a broader strategy implemented by the European Union via its legal and funding entity – the EuroHPC Joint Undertaking (JU). The JU will enable pooling of the Union’s and national resources on HPC to acquire, build, and deploy in Europe the most powerful supercomputers worldwide.

EPI is one of the cornerstones of this EU HPC strategic plan. Drawing on the expertise of the partners in the consortium, EPI aims to bring a low-power microprocessor to market. It will ensure that the key competence of high-end chip and system design remains in Europe, a critical requirement for many application areas. Thanks to such new European-developed technologies, European researchers from academia and industry will be able to access HPC systems at exceptional levels of energy-efficient performance. As recognized by high-level EU officials, EPI will contribute to Europe’s scientific leadership, industrial competitiveness, engineering skills and know-how – not to mention society as a whole.

“European Processor Initiative will deliver key technologies to the new European HPC strategic plan for an independent and innovative European high-performance computing and data ecosystem. Energy efficient high-performance families of EPI processors will include most advanced general-purpose and accelerator cores that will deliver unprecedented processing capabilities, enabling EU researchers from academia and industry to most efficiently address global challenges. The business sustainability of the initiative is supported by carefully balanced target markets, with primary focus on exascale HPC/AI and automotive markets,” said Jean-Marc Denis, EPI Chairman of the Board.

“It is a privilege to lead this consortium and enable the creation of a new big player in the field of advanced semiconductors in Europe. We have the best teams, and a huge portfolio of expertise on board from deep node submicron, co-Design, computer science, to HPC, and automotive end-products. We expect to ship from 2021 our 1^st high class and high-performance solution,” said Philippe Notton, General Manager of EPI.

“Acceleration is crucial to continued performance gains while reducing power consumption in computing. In EPI, the first accelerator will begin from RISC-V technology to deliver two unique vector and artificial intelligence accelerators for HPC and AI, since future supercomputers will be mostly heterogeneous; the second accelerator, based on Kalray’s IP, will lead the path to deterministic automotive computation. Both are offering a European solution to future global converged (HPC and AI) computing needs,” said Professor Mateo Valero, Director of Barcelona Supercomputing Center.

“The combination of general-purpose processors, hardware accelerators, security modules, and further IP modules on a system-on-chip is one of the key success factors for realizing a high-performant and energy-efficient automotive computing platform for autonomous driving and connected mobility”, said Matthias Traub, manager of electric/electronic architecture at BMW Group Research.

EPI will use a holistic approach to refine the system architecture and its component specifications. All aspects of the solution, and their interactions, will be considered and tackled simultaneously, taking a co-design approach:

• hardware platform architecture and components
• system and runtime software (OS, middleware, developers kit, compilers and libraries, etc.)
• HPC end-user applications

This approach will allow the consortium to meet the following goals:

• developing low-power microprocessor technology to be tentatively included in a European pre-exascale and subsequently exascale systems
• guaranteeing that a significant part of that technology is European,
• ensuring that the application areas of the technology are not limited only to HPC, but cover other areas such as the automotive sector and the data centers. Thus, ensuring the overall economic viability of the initiative. One specific objective for the automotive sector is to develop customized processors able to meet the performance needed for autonomous cars.

EPI plans to deliver two generations of processor families, with future families to follow. The architectural design of EPI processor families will ensure that individual processors address requirements specific to a particular market segment.

Full list of participating partners can be viewed here.

Impressions from the EuroHPC Summit Week 2019, that was held from 13 to 17 May in Poznań, Poland, are still fresh, as the event turned out a huge number of attendees and interesting topics covered in the 4-day event.

European Processing Initiative, under the moderating lead of Mr Leonardo Flores Añover and Mr Andrea Feltrin from DG CNECT, participated in a half-day workshop titled “Co‐designing with the European Processor Initiative”. The goals of the workshop were to identify applications that could drive co‐design for EPI and the pilot system projects; introduce attendees to co‐design for EPI and pilot system ideas leading to supercomputers based on EPI technologies; discuss component‐level vs. system‐level co‐design: who does what when; highlight ongoing co‐design efforts within EPI; bring application and technology/system architecture experts together; show the current status of the software landscape, and discuss how they can contribute to a coherent effort towards the European Exascale supercomputers.

Presenters from EPI covered those topics in 6 short presentations, while the session closed with an expert panel. Participants of the panel emphasized the importance of selecting a set of communities and involving them strongly in the co-design process. The communities should be those that really need Exascale performance, have high societal impact and are committed to participate in the co-design work. The systems in question will be heterogeneous and it is important to make them as user-friendly as possible; therefore, the middleware and programming environment play a very important role.

The panel also concluded that the use of HPC systems as workflows is increasing – they very often contain HPC with HPDA and AI. At Exascale level, workflows add an order of magnitude to the complexity. Using the sole general purpose processor combined at interposer level with many different accelerators helps drive the complexity down. EPI offers this unique feature. It is very important to provide middleware to properly support for workflows, also on heterogeneous systems.

The pilot system must demonstrate scalability, energy efficiency and reliability. Risks should be limited to a particular aspect/component of the system and the pilots should be operational, enable application running on them to prepare for Exascale, and provide results that increase visibility. The panel believes such visibility can be ensured through training as well – it is an opportunity to attract more people to the HPC field. It should be more attractive for young people, starting as early as school level. The panel concluded, looking to the future developments, that after Exascale, the goal should be not so much related to increasing speed, but making the Exascale systems much more efficient. Real-world application and workflow efficiency, as well as performance, need to be increased.

Jean-Marc Denis, Chairman of the Board of the European Processor Initiative, attended the Supercomputing Asia event in Singapore, at the Suntec Singapore Convention and Exhibition Centre, presenting EPI activities and efforts.

Visitors to SC Asia could also find out more about EPI’s goals and roadmap by visiting the European Commission booth, which graciously hosted EPI materials, flyers and posters. Pictured here is Sébastien Varrette, from the Université du Luxembourg, at the EC/EPI/PRACE booth.