As Europe accelerates its efforts in chip sovereignty, scientific applications need to be ported to and evaluated on emerging prototypes, assessing their performance as well as the technology readiness of the new hardware platforms. In this talk, CEEC will share the experiences and lessons learned when porting applications from CEEC and other Centers of Excellence to the long-vector RISC-V accelerators from the EPI and EUPILOT projects across different domains and applications.
Attendees will learn code optimization techniques, common performance pitfalls, and evaluation methods for long-vector architectures, which they can apply to their own applications and code bases in order to improve performance on these novel hardware platforms.
Registration is available: https://ceec-coe.eu/event/flagship-scientific-applications-on-a-european-risc-v-long-vector-accelerator-lessons-learned/
